There are a dizzying array of different logic families available. They have developed over time to operate on different voltages and at different speeds. This can presents problems when you find it necessary to connect two different logic families together. These problems are not insurmountable however, and there are a number of ways to connect different logic families together.
The first order of business is to determine of the different families are compatible. In general, all logic chips that operate on the same supply voltage are compatible with each other. The exception to this generality occurs when you try to drive low speed logic with a very fast or high frequency signal. The other major caveat has to do with specialty logic families such as ECL (PECL and NECL). To connect to and from these families, it is best to use purpose built chips.
We normally think of logic gates as operating on highs and lows or 1s and 0s. But what does this mean? You can think of the input to a gate as acting something like a voltage comparator. There is a specific input voltage below which the input is assured to be low (a logic 0). The same input has a threshold voltage above which the input is assured to be high (a logic 1).
These thresholds are called VIL for the input low voltage threshold and VIH for the input high voltage threshold. The logic also has a guaranteed minimum output voltage when it is outputting a high, called VOH, and a guaranteed maximum when it is outputting a low, called VOL.
When connecting the output of one gate to the input of another, things will work correctly as long as the output low voltage is less than the input low threshold ( VOL < VIL ) and the output high voltage is greater than the input high threshold ( VOH > VIH ).
Remember that this does not address the speed of the logic signals and driving a high speed / high frequency signal into logic that is too slow to deal with it is a guaranteed fail.
Interface Low Voltage Logic to Higher Voltage Logic
In many cases this works and you can drive the input to 5V logic families (particularly TTL logic) with most 3.3V and 2.5V logic families. As always, when the application is critical, check the data sheets of the specific chips you are using.
Let’s take a look at why this works. Logic families such as traditional 74 series TTL logic, ACT, HCT, and ABT to name a few, all support standard TTL thresholds of 2.0V for VIH and 0.8V for VIL.
The typical high output for 3.3V logic is 2.4V. Given that 2.4 > 2.0, the 3.3V part is able to reliably drive the input high for TTL families mentioned. Likewise, the low output is 0.4V which is well below the TTL 0.8V threshold. Surprisingly, many 2.5V logic families are also compatible with a high output of 2.3V and a low output of 0.2V.
The story is different for 5V CMOS chips such as the HC, AC, or AHC families. They have a high input threshold voltage (VIH) of 3.5V which means lower voltage logic families are incompatible. To get around this, there are chips that are designed specifically for interfacing different logic families. Search for “logic level translators” to find one that is suitable for your specific application. You can roll your own level translator from discrete transistors but in most cases buying an off the shelf level translator is your best bet.
Interface Higher Voltage Logic to Lower Voltage Logic
You might think that, given that the threshold voltages are compatible, it would be a simple matter to drive a lower voltage chip with a higher voltage one. This is not necessarily the case. The issue has to do with the maximum output voltage for a high logic level, not the minimum output voltage (VOH) we were concerned with earlier.
It is entirely reasonable to expect that a 5V logic chip will produce a high output that is near the supply voltage. This may exceed the maximum input limits of a lower voltage chip. Some low voltage logic chips are specifically made to tolerate high voltage inputs and some are not. Check the data sheet for the specific chip in question.
If the lower voltage chip isn’t tolerant of higher voltage inputs, there are a number of solutions to employ. The simplest is using as resistor between the output of the higher voltage chip and the input of the lower voltage chip. Why does this work? It has to do with the intrinsic input diodes on the lower voltage chip and the current limiting provided by the resistor as shown in the following figure.
Current will flow from the higher voltage logic chip through the resistor and then through the input protection diode to the lower voltage logic chip’s power supply. The resistor is used to limit this current to a safe value (typically a few milliamps) and, given that the diode is in conduction, limits the voltage at the lower voltage chips input to one diode drop above the chips supply voltage. Typical resistor values used are on the order of 1KΩ to about 10kΩ.
The downside to this scheme is that the resistor, in combination with the input capacitance of the lower voltage chip, form an RC filter that can limit the operating frequency and skew the waveforms rise time. Lowering the resistance value can help mitigate the effect and for many circuits, this approach works well.
For high speed operation a logic level translator chip may be order. As discussed above, search for “logic level translators” to find one that is suitable for your specific application. You can roll your own level translator from discrete transistors but in most cases buying an off the shelf level translator is your best bet.
Open Collector Outputs
Some gates are available with open collector (or drain) outputs. This style of gate has only one output transistor which can sink current. This is different than a typical gate’s output which has two transistors in a totem pole configuration. One that connects the output to the positive supply and one that connects it to ground. If the gate has an open collector output, connecting higher voltage logic to lower voltage logic is a simple matter. These sorts of gates also make it simple to interface to other, non logic gate loads. This is shown in the figure below.
The output of the open collector gate is shown as a transistor. The pull up resistor shown is connected to the lower voltage power supply. Typical resistor values used are on the order of 1KΩ to about 10kΩ. When the output is high, the transistor is off and the low voltage logic gate is connected to a high via the resistor. When the output is low, the input to the low voltage gate is pulled to ground via the transistor and the gate sees a low input.
The downside to this scheme is that the resistor, in combination with the input capacitance of the lower voltage chip, form an RC filter that can limit the operating frequency and skew the waveforms rise time. Lowering the resistance value can help mitigate the effect.